A Design Experience of A GaAs Datapath Generation Using Compilers Methodology

Rapide design of integrated circuits can be achieved in using compilers and CAD tools. The time-to-market constraint is also applied to Gallium Arsenide circuits, which recently demonstrated high level integration and high speed operation. This paper describes a design methodology for a datapath generation of such circuits. On using VHDL as the input speciication language and RISC as the target, we have developed a library of components to be used during the design of the datapath as from a behavioral level. In order to generate a Register Transfer level description as from the behavioral description, a high-level synthesis tool was used, allowing this step to be automated. The high level design is mapped onto a GaAs technology library to achieve high performance regarding speed, area and power consumption .